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  femtoclocks? crystal-to-lvds frequency synthesizer ics844008i-15 idt ? / ics ? lvds frequency synthesizer 1 ics844008byi-15 rev. a august 14, 2007 g eneral d escription the ics844008i-15 is an 8 output lvds synthesizer optimized to gener ate pci express? reference clock frequencies and is a member of the hiperclocks tm family of high performance clock solutions from idt. using a 25mhz parallel resonant crystal, the following frequencies can be generated based on f_sel pin: 100mhz or 125mhz. the ics844008i-15 uses idt?s 3 rd generation low phase noise vco technology and can achieve <1ps typical rms phase jitter, easily meeting pci express jitter requirements. the ics844008i-15 is packaged in a 32-pin lqfp package. f eatures ? eight lvds outputs ? crystal oscillator interface ? supports the following output frequencies: 100mhz or 125mhz ? vco: 500mhz ? rms phase jitter @ 125mhz, using a 25mhz crystal (1.875mhz - 20mhz): 0.42ps (typical) ? full 3.3v supply modes ? -40c to 85c ambient operating temperature ? available in both standard (rohs 5) and lead-free (rohs 6) packages hiperclocks? ic s p in a ssignment f requency s elect f unction t able 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 q0 nq0 v dd q1 nq1 gnd q2 nq2 mr nq4 q4 gnd v dd nq3 q3 f_sel v dda npll_sel v dd oe2 gnd xtal_out xtal_in oe1 ics844008i-15 32-lead lqfp 7mm x 7mm x 1.4mm package body y package top view q7 nq7 v dd q6 nq6 gnd q5 nq5 1 0 phase detector vco 500mhz (w/25mhz reference) m = 20 (fixed) 4 5 osc b lock d iagram npll_sel xtal_in xtal_out mr f_sel oe2 q0 nq0 q1 nq1 q2 nq2 q3 nq3 q4 nq4 q5 nq5 q6 nq6 q7 nq7 pullup pullup 25mhz pulldown pullup pulldown t u p n i t u p t u o y c n e u q e r f ) z h m ( t u p n i y c n e u q e r f ) z h m (l e s _ f r e d i v i d m e u l a v r e d i v i d n e u l a v r e d i v i d n / m e u l a v z h m 5 200 24 5 5 2 1 z h m 5 210 25 4 ) t l u a f e d ( 0 0 1 oe1
idt ? / ics ? lvds frequency synthesizer 2 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k t able 3a. oe1 f unction t able t u p n is t u p t u o 1 e o4 q n : 0 q n , 4 q : 0 q 0e t a t s z - i h n i s t u p t u o s e c a l p 1n o i t a r e p o l a m r o n t able 3b. oe2 f unction t able t u p n is t u p t u o 2 e o7 q n : 5 q n , 7 q : 5 q 0e t a t s z - i h n i s t u p t u o s e c a l p 1n o i t a r e p o l a m r o n r e b m u ne m a ne p y tn o i t p i r c s e d 2 , 10 q n , 0 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d , 2 1 , 3 7 2 , 2 2 v d d r e w o p. n i p y l p p u s e r o c 5 , 41 q n , 1 qt u p u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d , 3 1 , 6 9 2 , 9 1 d n gr e w o p. d n u o r g y l p p u s r e w o p 8 , 72 q n , 2 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 9l e s _ ft u p n ip u l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l n i p t c e l e s y c n e u q e r f 1 1 , 0 13 q n , 3 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 5 1 , 4 14 q n , 4 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 6 1r mt u p n in w o d l l u p e r a s r e d i v i d l a n r e t n i e h t , h g i h c i g o l n e h w . t e s e r r e t s a m h g i h e v i t c a x q n s t u p t u o d e t r e v n i e h t d n a w o l o g o t x q s t u p t u o e u r t e h t g n i s u a c t e s e r e r a s t u p t u o e h t d n a s r e d i v i d l a n r e t n i e h t , w o l c i g o l n e h w . h g i h o g o t . s l e v e l e c a f r e t n i l t t v l / s o m c v l . d e l b a n e 8 1 , 7 15 q , 5 q nt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 1 2 , 0 26 q , 6 q nt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 4 2 , 3 27 q , 7 q nt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 5 2v a d d r e w o p. n i p y l p p u s g o l a n a 6 2l e s _ l l p nt u p n in w o d l l u p , w o l n e h w . s r e d i v i d e h t o t t u p n i s a l a t x d n a l l p e h t n e e w t e b s t c e l e s . ) s s a p y b l l p ( l a t x e h t s t c e l e s , h g i h n e h w . ) e l b a n e l l p ( l l p s t c e l e s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 8 22 e ot u p n ip u l l u p . s t u p t u o 7 q n / 7 q : 5 q n / 5 q r o f e l b a n e t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l 1 3 , 0 3 , t u o _ l a t x n i _ l a t x t u p n i , t u p t u o e h t s i t u o _ l a t x . e c a f r e t n i l a t s y r c t n a n o s e r l e l l a r a p . t u p n i e h t s i n i _ l a t x 2 31 e ot u p n ip u l l u p . s t u p t u o 4 q n / 4 q : 0 q n / 0 q r o f e l b a n e t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l : e t o n n w o d l l u p d n a p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
idt ? / ics ? lvds frequency synthesizer 3 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer t able 4a. p ower s upply dc c haracteristics , dd = v dda = 3.3v5%, t a = -40c to 85c t able 4b. lvcmos / lvttl dc c haracteristics , dd = v dda = 3.3v5%, t a = -40c to 85c a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5v outputs, i o contin uous current 10ma surge current 15ma package thermal impedance, ja 65.7c/w (0 mps) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional op- eration of product at these conditions or any conditions beyond those listed in the dc characteristics or ac characteristics is not implied. exposure to absolute maximum rating conditions for ex- tended periods may affect product reliability. l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n iv d d v 3 . 3 =2v d d 3 . 0 +v v l i e g a t l o v w o l t u p n iv d d v 3 . 3 =3 . 0 -8 . 0v i h i t u p n i t n e r r u c h g i h l e s _ l l p n , r mv d d v = n i 5 6 4 . 3 =0 5 1a l e s _ f , 2 e o , 1 e ov d d v = n i 5 6 4 . 3 =5a i l i t u p n i t n e r r u c w o l l e s _ l l p n , r mv d d v , v 5 6 4 . 3 = n i v 0 =5 -a l e s _ f , 2 e o , 1 e ov d d v , v 5 6 4 . 3 = n i v 0 =0 5 1 -a t able 4c. lvds dc c haracteristics , dd = v dda = 3.3v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a d d e g a t l o v y l p p u s g o l a n av d d 5 1 . 0 ?3 . 3v d d v i d d t n e r r u c y l p p u s r e w o p 0 5 1a m i a d d t n e r r u c y l p p u s g o l a n a 5 1a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d o e g a t l o v t u p t u o l a i t n e r e f f i d0 6 20 6 30 6 4v m v d o v d o e g n a h c e d u t i n g a m 0 5v m v s o e g a t l o v t e s f f o2 . 13 . 15 . 1v v s o v s o e g n a h c e d u t i n g a m 0 5v m i z o t n e r r u c e g a k a e l e c n a d e p m i h g i h0 1 -1 0 1a i f f o e g a k a e l f f o r e w o p0 2 -1 0 2a i d s o t n e r r u c t i u c r i c t r o h s t u p t u o l a i t n e r e f f i d 5 . 3 -5 -a m i s o t n e r r u c t i u c r i c t r o h s t u p t u o 5 . 3 -5 -a m
idt ? / ics ? lvds frequency synthesizer 4 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer t able 6. ac c haracteristics , v dd = v dda = 3.3v5%, t a = -40c to 85c t able 5. c rystal c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 = l e s f5 2 1z h m 1 = l e s f0 0 1z h m t ) o ( k s2 , 1 e t o n ; w e k s t u p t u o 0 1 1s p t ) b ( k s3 , 2 e t o n ; w e k s k n a b 4 q n / 4 q : 0 q n / 0 q0 5s p 7 q n / 7 q : 5 q n / 5 q0 5s p t ) c c ( t i jr e t t i j e l c y c - o t - e l c y c 5 2s p t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 4 e t o n ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 5 2 12 4 . 0s p ) z h m 0 2 - z h m 5 7 8 . 1 ( , z h m 0 0 16 4 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 10 0 6s p c d oe l c y c y t u d t u p t u o 5 45 5% . s c e p s t e g r a t n g i s e d e r a s e u l a v m u m i x a m d n a m u m i n i m . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 1 e t o n v t a d e r u s a e m d d . 2 / . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 2 e t o n . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v e m a s e h t t a s t u p t u o f o k n a b a n i h t i w w e k s s a d e n i f e d : 3 e t o n . t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 4 e t o n r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 5 2z h m 1 e t o n ; ) m p p ( n o i l l i m r e p s t r a p 0 0 1m p p ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 4 e c n a t i c a p a c t n u h s 5f p l e v e l e v i r d 0 0 1w . l a t s y r c t n a n o s e r l e l l a r a p f p 8 1 n a g n i s u d e z i r e t c a r a h c : e t o n . d r a o b c p r e s u r o f d e t s u j d a s p a c m i r t l a n r e t x e d n a l a t s y r c m p p 0 5 d e d n e m m o c e r h t i w d e s u n e h w : 1 e t o n
idt ? / ics ? lvds frequency synthesizer 5 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer t ypical p hase n oise at 125mh z 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 125mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.42ps (typical) o ffset f requency (h z ) 1k 10k 100k 1m 10m 100m dbc hz n oise p ower ? ? ? raw phase noise data phase noise result by adding pci express filter to raw data pci express jitter filter t ypical p hase n oise at 100mh z 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.46ps (typical) o ffset f requency (h z ) 1k 10k 100k 1m 10m 100m dbc hz n oise p ower ? ? ? raw phase noise data phase noise result by adding pci express filter to raw data pci express jitter filter
idt ? / ics ? lvds frequency synthesizer 6 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer p arameter m easurement i nformation rms p hase j itter 3.3v c ore /3.3v o utput l oad ac t est c ircuit t sk(o) qy qx nqy nqx phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power t pw t period t pw t period odc = x 100% q0:q7 nq0:nq7 c ycle - to -c ycle j itter o utput s kew scope qx nqx 3.3v5% power supply +? float gnd lvds d ifferential o utput v oltage s etup o utput r ise /f all t ime ? ? ? ? q0:nq7 nq0:nq7 t jit(cc) = t cycle n ? t cycle n+1 1000 cycles t cycle n t cycle n+1 clock outputs 20% 80% 80% 20% t r t f v sw i n g v dda v dd o utput d uty c ycle /p ulse w idth /p eriod b ank s kew ? ? ? 100 out out lv d s dc input v od / v od v dd t sk(b) qy qx nqy nqx where x = 0, 1, 2, 3 or 4, and where y = 5, 6 or 7
idt ? / ics ? lvds frequency synthesizer 7 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer d ifferential o utput v oltage s etup o ffset v oltage s etup h igh i mpedance l eakage c urrent s etup o utput s hort c ircuit c urrent s etup p ower o ff l eakage s etup d ifferential o utput s hort c ircuit s etup out out lvds dc input ? ? ? v os / v os v dd ? ? ? 100 out out lv d s dc input v od / v od v dd out out lv d s dc input ? i osd v dd out lv d s dc input ? i os ? i osb v dd out lv d s ? i off v dd out out lv d s dc inpu t ? ? 3.3v5% power supply float gnd + _ i oz i oz p arameter m easurement i nformation , continued
idt ? / ics ? lvds frequency synthesizer 8 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer c rystal i nput i nterface the ics844008i-15 has been characterized with an 18pf parallel resonant crystals. the capacitor values shown in f igure 2. c rystal i npu t i nterface figure 2 below were determined using a 25mhz parallel resonant crystal and were chosen to minimize the ppm error. a pplication i nformation as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ics844008i-15 provides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v dd and v dda should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 1 illustrates how a 10 resistor along with a 10f and a 0.01 f bypass capacitor should be connected to each v dda . p ower s upply f iltering t echniques f igure 1. p ower s upply f iltering 10 v dda 10 f .01 f 3.3v .01 f v dd c1 27p x1 18pf parallel crystal c2 27p xtal_out xtal_in i nputs : lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. r ecommendations for u nused i nput and o utput p ins o utputs : lvds all unused lvds outputs should be terminated with 100 resistor between the differential pair.
idt ? / ics ? lvds frequency synthesizer 9 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer f igure 3. t ypical lvds d river t ermination 3.3v lvds d river t ermination a general lvds interface is shown in figure 3. in a 100 differential transmission line environment, lvds drivers require a matched load termination of 100 across near the receiver input. for a multiple lvds outputs buffer, if only partial outputs are used, it is recommended to terminate the unused outputs. r1 100 3.3v 100 ohm differential transmission line 3.3v + - lvds f igure 4. ics844008i-15 s chematic e xample s chematic e xample figure 4 shows an example of 844008i-15 application schematic. in this example, the device is operated at v dd =3.3v. the 18pf parallel resonant 25mhz crystal is used. the c1 = 27pf and c2 = 27pf are recommended for frequency accuracy. for different board layout, the c1 and c2 may be slightly adjusted for optimizing frequency accuracy. two examples of lvds for receiver without built-in termination are shown in this schematic. oe2 nq3 c6 0.1uf x1 25mhz q4 zo = 50 ohm rd2 1k c9 0.1uf q3 q1 npll_sel mr ru1 1k vdda q5 18pf vdd vdd c7 0.1uf to logic input pins q5 logic control input examples vdd nq1 ru2 not install c8 0.1uf set logic input to '1' vdd nq6 nq4 vdd=3.3v q6 nq5 alternate lvds termination vdd c2 27pf rd1 not install r4 50 r3 50 q7 c3 0.01u q0 f_sel zo = 50 ohm r1 10 nq7 q2 vdd nq0 set logic input to '0' c4 10uf + - nq5 oe1 nq7 zo = 50 ohm vdd r2 100 + - c5 0.1uf zo = 50 ohm c1 27pf nq2 q7 u1 ics844008i-15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 32 31 30 29 28 27 26 25 q0 nq0 vdd q1 nq1 gnd q2 nq2 f_sel q3 nq3 vdd gnd q4 nq4 mr nq5 q5 gnd nq6 q6 vdd nq7 q7 oe1 xtal_in xtal_out gnd oe2 vdd npll_sel vdda to logic input pins
idt ? / ics ? lvds frequency synthesizer 10 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer p ower c onsiderations this section provides information on power dissipation and junction temperature for the ics844008i-15. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ics844008i-15 is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v dd = 3.3v + 5% = 3.465v, which gives worst case results. ? power (core) max = v dd_max * (i dd_max + i dda_max ) = 3.465v * (150ma + 15ma) = 571.73mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming no air flow and a multi-layer board, the appropriate value is 65.7c/w per table 7 below. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 0.572w * 65.7c/w = 122.5c. this is below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). t able 7. t hermal r esistance ja for 32-l ead lqfp, f orced c onvection ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 65.7c/w 55.9c/w 52.4c/w
idt ? / ics ? lvds frequency synthesizer 11 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer r eliability i nformation t ransistor c ount the transistor count for ics844008i-15 is: 2609 t able 8. ja vs . a ir f low t able for 32 l ead lqfp ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 65.7c/w 55.9c/w 52.4c/w
idt ? / ics ? lvds frequency synthesizer 12 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer p ackage o utline - y s uffix for 32 l ead lqfp t able 9. p ackage d imensions reference document: jedec publication 95, ms-026 n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y s a b b m u m i n i ml a n i m o nm u m i x a m n 2 3 a - -- -0 6 . 1 1 a 5 0 . 0- -5 1 . 0 2 a 5 3 . 10 4 . 15 4 . 1 b 0 3 . 07 3 . 05 4 . 0 c 9 0 . 0- -0 2 . 0 d c i s a b 0 0 . 9 1 d c i s a b 0 0 . 7 2 d . f e r 0 6 . 5 e c i s a b 0 0 . 9 1 e c i s a b 0 0 . 7 2 e . f e r 0 6 . 5 e c i s a b 0 8 . 0 l 5 4 . 00 6 . 05 7 . 0 0 - - 7 c c c - -- -0 1 . 0
idt ? / ics ? lvds frequency synthesizer 13 ics844008byi-15 rev. a august 14, 2007 ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer while the information presented herein has been checked for both accuracy and reliability, integrated device technology, incorp orated (idt) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patents, or l icenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extraordinary environmental r equirements are not recommended without additional processing by idt. idt reserves the right to change any circuitry or specifications without notice. idt does not authorize or warrant any idt product for use in life support devices or critical medical instruments. t able 10. o rdering i nformation r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t f l 5 1 - i y b 8 0 0 4 4 8 s c il 5 1 i b 8 0 0 4 s c ip f q l " e e r f - d a e l " d a e l 2 3e b u tc 5 8 o t c 0 4 - t f l 5 1 - i y b 8 0 0 4 4 8 s c il 5 1 i b 8 0 0 4 s c ip f q l " e e r f - d a e l " d a e l 2 3l e e r & e p a t 0 0 0 1c 5 8 o t c 0 4 - . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n
innovate with idt and accelerate your future networks. contact: www.idt.com for sales 800-345-7015 408-284-8200 fax: 408-284-2775 for tech support netcom@idt.com 480-763-2056 corporate headquarters integrated device t echnology, inc. 6024 silver creek valley road san jose, ca 95138 united states 800 345 7015 +408 284 8200 (outside u.s.) asia pacific and japan integrated device technology singapore (1997) pte. ltd. reg. no. 199707558g 435 orchard road #20-03 wisma atria singapore 238877 +65 6 887 5505 europe idt europe, limited 321 kingston road leatherhead, surrey kt22 7tu england +44 (0) 1372 363 339 fax: +44 (0) 1372 378851 ? 2007 integrated device technology, inc. all rights reserved. product specifications subject to change without notice. idt, th e idt logo, ics and hiperclocks are trademarks of integrated device technology, inc. accelerated thinking is a service mark of integrated device technology, inc. all other br ands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. printed in usa ics844008i-15 femtoclocks? crystal-to-lvds frequency synthesizer


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